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mp8709 high efficiency 4a, 21v, 500khz synchronous step-down converter mp8709 rev. 1.01 www.monolithicpower.com 1 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the mp8709 is a high frequency synchronous rectified step-down switch mode converter with built in power mosfets. it offers a very compact solution to achieve 4a continuous output current over a wide input supply range with excellent load and line regulation. the mp8709 has synchronous mode operation for higher efficiency over output current load range. mp8709 achieves low emi signature with well controlled switching edges. current mode operation provides fast transient response and eases loop stabilization. full protection features include ocp and thermal shut down. the mp8709 requires a minimum number of readily available standard external components and is available in a s pace saving 8-pin soic package with an exposed pad. features ? wide 4.5v to 21v operating input range ? 4a output current ? low rds(on) internal power mosfets ? low-emi switching speed technology ? high efficiency synchronous mode operation ? fixed 500khz switching frequency ? sync from 300khz to 2mhz external clock ? internal compensation ? integrated bootstrap diode ? ocp protection (hiccup mode) ? thermal shutdown ? output adjustable from 0.8v ? available in a thermally enhanced 8-pin soic package applications ? notebook systems and i/o power ? networking systems ? digital set top boxes ? personal video recorders ? flat panel television and monitors ? distributed power systems all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. typical application c1 22uf mp8709 sw gnd fb en/sync in bst vcc c4 0.1uf r2 10k rt 56k r1 4.99k l1 1.8uh c2 47uf c3 0.1uf vin vout 1.2v on/off 6 8 4 2,3 1 7 5 21 efficiency v out =1.2v output current (a) efficiency (%) 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 4 v in =4.5v v in =12v v in =21v
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 2 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number* package top marking free air temperature (t a ) MP8709EN soic8e MP8709EN -20 c to +85 c * for tape & reel, add suffix ?z (e.g. MP8709EN?z); for rohs compliant packaging, add suffix ?lf (e.g. MP8709EN?lf?z) package reference in sw sw bst gnd vcc fb en/sync 1 2 3 4 8 7 6 5 top view exposed pad on backside connect to gnd absolute maxi mum ratings (1) supply voltage v in ....................................... 22v v sw ........................-0.3v (-5v for < 10ns) to 23v v bs ....................................................... v sw + 6v all other pins ..................................-0.3v to +6v operating temperature.............. -20 c to +85 c continuous power dissipation (t a = +25c) (2) ?????????????????....2.5w junction temperature ...............................150 c lead temperature ....................................260 c storage temperature............... -65 c to +150 c recommended operating conditions (3) supply voltage v in ...........................4.5v to 21v operating junct. temp (t j )...... -20 c to +125 c thermal resistance (4) ja jc soic8e (exposed pad) ..........50 ...... 10 ... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 3 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics v in = 12v, t a = +25 c, unless otherwise noted. parameters symbol condition min typ max units supply current (shutdown) i in v en = 0v 10 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.7 ma hs switch on resistance hs rds-on 120 m ? ls switch on resistance ls rds-on 20 m ? switch leakage sw lkg v en = 0v, v sw = 0v or 12v 0 10 a current limit (5) i limit 5 6.1 7.4 a oscillator frequency f sw v fb = 0.75v 425 500 575 khz fold-back frequency f fb v fb = 300mv 0.25 f sw maximum duty cycle d max v fb = 700mv 85 90 % sync frequency range f sync 0.3 2 mhz feedback voltage v fb t a = -20 c to + 85 c 789 805 821 mv feedback current i fb v fb = 800mv 10 50 na en rising threshold v en_rising 1 1.3 1.6 v en threshold hysteresis v en_hys 0.4 v v en = 2v 2 en input current i en v en = 0v 0 a en turn off delay en td-off 5 s v in under voltage lockout threshold rising inuv vth 3.8 4.0 4.2 v v in under voltage lockout threshold hysteresis inuv hys 880 mv vcc regulator v cc 5 v vcc load regulation icc=2ma 5 % soft-start period 2 4 6.5 ms thermal shutdown t sd 150 c note: 5) guaranteed by design.
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 4 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions pin # name description 1 in supply voltage. the mp8709 operates from a +4.5v to +21v input rail. c1 is needed to decouple the input rail. use wide pcb trace to make the connection. 2,3 sw switch output. use wide pcb trace to make the connection. 4 bst bootstrap. a capacitor connected between sw and bs pins is required to form a floating supply across the high-side switch driver. 5 en/sync en=1 to enable the chip. external clock can be applied to en pin for changing switching frequency. for automatic start-up, connect en pin to vin by proper en resistor divider as figure 2 shows. 6 fb feedback. an external resistor divider from the output to gnd, tapped to the fb pin, sets the output voltage. to preven t current limit run away during a short circuit fault condition the frequency fold -back comparator lowers the oscillator frequency when the fb voltage is below 500mv. 7 vcc bias supply. decouple with 0.1 f~0.22 f cap. and the capacitance should be no more than 0.22 f 8 gnd, exposed pad system ground. this pin is the referenc e ground of the regulated output voltage. for this reason care must be taken in pcb layout. suggested to be connected to gnd with copper and vias.
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 5 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics v in = 12v, v out = 1.2v, l=1.8 h, t a = +25oc, unless otherwise noted. load regulation enabled supply current vs input voltage peak current vs duty cycle operating range vcc regulator line regulation 700 705 710 715 720 725 730 735 740 745 750 peak current (a) line regulation normalized output voltage(%) case temperature rise vs. output current 0 5 10 15 20 25 -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 0 5 10 15 20 25 disabled supply current vs input voltage 3.5 4 4.5 5 5.5 0 5 10 15 20 25 5 5.2 5.4 5.6 5.8 6 6.2 6.4 6.6 6.8 7 0102030405060708090100 0.1 1 10 100 0 5 10 15 20 25 output voltage (v) dmax limit minimum on time limit -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 01234 vin=12v v in =4.5v v in =21v -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 0 5 10 15 20 25 io=0a io=2a io=4a 0 10 20 30 40 50 012345 .
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 6 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics (continues) v in = 12v, v out = 1.2v, l=1.8 h, t a = +25oc, unless otherwise noted. output current (a) efficiency v out =1.2v efficiency v out =2.5v efficiency v out =3.3v efficiency v out =1.8v output current (a) output current (a) output current (a) efficiency (%) efficiency (%) efficiency (%) efficiency (%) 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 4 v in =4.5v v in =12v v in =21v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 4 v in =4.5v v in =12v v in =21v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 4 v in =4.5v v in =12v v in =21v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 4 v in =4.5v v in =21v v in =12v
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 7 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics ( continues ) v in = 12v, v out = 1.2v, l=1.8 h, t a = +25oc, unless otherwise noted. enable startup with 4a load load transient response i out =2a to 4a enable startup without load power up with 4a load v out 1v/div v sw 10v/div i inductor 5a/div v out 1v/div v en 5v/div v sw 10v/div i inductor 5a/div v out 1v/div v en 5v/div v sw 10v/div i inductor 5a/div v out 1v/div v in 10v/div v sw 10v/div i inductor 5a/div 2ms/div 4ms/div 10ms/div 10ms/div short entry v out 1v/div v sw 10v/div i inductor 5a/div 4ms/div short recovery output ripple voltage i out =4a input ripple voltage i out =4a v sw 5v/div v in /ac 100mv/div power up without load v out 1v/div v in 10v/div v sw 10v/div i inductor 5a/div 10ms/div v sw 5v/div v out /ac 20mv/div i inductor 5a/div v out /ac 50mv/div i load 2a/div
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 8 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. block diagram hs m1 m2 driver vcc gnd fb en/sync in bst sw error amplifier pwm comparator current limit comparator current sense amplifer ls ilim comparator + - ls driver boost regulator vcc vcc regulator oscillator reference - + - + + - logic + - + 50pf 1pf 1meg 400k figure 1?functional block diagram
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 9 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operation the mp8709 is a high frequency synchronous rectified step-down switch mode converter with built in internal power mosfets. it offers a very compact solution to achieve 4a continuous output current over a wide input supply range with excellent load and line regulation. the mp8709 operates in a fixed frequency, peak current control mode to regulate the output voltage. a pwm cycle is initiated by the internal clock. the integrated high-side power mosfet is turned on and remains on until its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if, in 90% of one pwm period, the current in the power mosfet does not reach the comp set current value, the power mosfet will be forced to turn off internal regulator most of the internal circuitries are powered from the 5v internal regulator. this regulator takes the vin input and operates in the full vin range. when vin is greater than 5.0v, the output of the regulator is in full regulation. when vin is lower than 5.0v, the output decreases, a 0.1uf ceramic capacitor for decoupling purpose is required. error amplifier the error amplifier compares the fb pin voltage with the internal 0.805v reference (ref) and outputs a current proportional to the difference between the two. this output current is then used to charge or discharge the internal compensation network to form the comp voltage, which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. enable/sync control en/sync is a digital control pin that turns the regulator on and off. drive en high to turn on the regulator, drive it low to turn it off. there is an internal 1meg resistor from en/sync to gnd thus en/sync can be floated to shut down the chip. 1) enabled by external logic h/l signal the chip starts up once the enable signal goes higher than en/sync input high voltage (2v), and is shut down when the signal is lower than en/sync input low voltage (0.4v). to disable the chip, en must be pulled low for at least 5s. the input is compatible with both cmos and ttl. 2) enabled by vin through voltage divider. connect en with vin through a resistive voltage divider for automatic startup as the figure 2 shows. en v in r en1 r en2 figure 2?enable divider circuit choose the value of the pull-up resistor r en1 and pull-down resistor r en2 to reset the automatic start-up voltage: r r (r v v en2 en2 en1 en_rising in_start + ? = m m 1 || ) 1 || where v en_rising is 1.3v + ? = m m 1 || ) 1 || en2 en2 en1 falling - en in_stop r r (r v v where v en_falling is 0.9v for example, r en1 =100k ? and r en2 =20k ? , the v in-start is set at 7.9v, v in-stop is set at 5.49v. the startup sequence is as below using the en divider. v cc-rising is the vcc uvlo rising threshold which is about 4.0v. figure 3?startup sequence using en divider 3) synchronized by external sync clock signal the chip can be synchronized to external clock range from 300khz up to 2mhz through this pin 2ms right after output voltage is set, with the
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 10 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. internal clock rising edge synchronized to the external clock rising edge. figure 4?startup sequence using external sync clock signal under-voltage lockout (uvlo) under-voltage lockout (uvlo) is implemented to protect the chip from operating at insufficient supply voltage. the mp8709 uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 4.0v while its falling threshold is a consistent 3.2v. internal soft-start the soft-start is implemented to prevent the converter output voltage from overshooting during startup. when the chip starts, the internal circuitry generates a soft-start voltage (ss) ramping up from 0v to 1.2v. when it is lower than the internal reference (ref), ss overrides ref so the error amplifier uses ss as the reference. when ss is higher than ref, ref regains control. the ss time is internally fixed to 4ms. over-current-protection and hiccup the mp8709 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. meanwhile, output voltage starts to drop until fb is below the under- voltage (uv) threshold, typically 30% below the reference. once a uv is triggered, the mp8709 enters hiccup mode to periodically restart the part. this protection mode is especially useful when the output is dead-short to ground. the average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. the mp8709 exits the hiccup mode once the over current condition is removed. thermal shutdown thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. when the silicon die temperature is higher than 150 c, it shuts down the whole chip. when the temperature is lower than its lower threshold, typically 140 c, the chip is enabled again. floating driver and bootstrap charging the floating power mosfet driver is powered by an external bootstrap capacitor. this floating driver has its own uvlo protection. this uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by vin through d1, m3, c4, l1 and c2 (figure 2). if (vin-vsw) is more than 5v, u2 will regulate m3 to maintain a 5v bst voltage across c4. sw figure 2?internal bootstrap charging circuit startup and shutdown if both vin and en are higher than their appropriate thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides stable supply for the remaining circuitries. three events can shut down the chip: en low, vin low and thermal shutdown. in the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 11 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. application information setting the output voltage the external resistor divider is used to set the output voltage (see typical application on page 1). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see typical application on page 1). choose r1 to be around 40.2k ? for optimal transient response. r2 is then given by: 1 v v r1 r2 fb out ? = the t-type network is highly recommended when vo is low, as figure 3 shows. fb 1 r2 r1 rt vout figure 3? t-type network table 1 lists the recommended t-type resistors value for common output voltages. table 1?resistor selection for common output voltages v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) l ( h) c out ( f, ceramic) 1.05 4.99 16.5 56 1-4.7 47 1.2 4.99 10.2 56 1-4.7 47 1.5 4.99 5.76 47 1-4.7 47 1.8 4.99 4.02 47 1-4.7 47 2.5 10 4.75 30 1-4.7 47 3.3 10 3.24 20 1-4.7 47 5 10 1.91 15 1-4.7 47 note: the above feedback resistor table applies to a specific load capacitor condition as shown in t he table 1. other capacitive loading conditions will require different values. selecting the inductor a 1h to 10h inductor with a dc current rating of at least 25% percent higher than the maximum load current is recommended for most applications. for highest efficiency, the inductor dc resistance should be less than 15m ? . for most designs, the inductance value can be derived from the following equation. osc l in out in out f i v ) v v ( v l ? = where i l is the inductor ripple current. choose inductor ripple current to be approximately 30% if the maximum load current, 4a. the maximum inductor peak current is: 2 i i i l load ) max ( l + = under light load conditions below 100ma, larger inductance is recommended for improved efficiency. selecting the input capacitor the input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most applications, a 22f capacitor is sufficient. since the input capacitor (c1) absorbs the input switching current it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worse case condition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose the input capacitor whose rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when electrolytic or tantalum capacitors are used, a small, high quality ceramic capacitor, i.e. 0.1 f, should be placed as close to the ic as possible. when using ceramic
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 12 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out s load in v v 1 v v 1 c f i v selecting the output capacitor the output capacitor (c2) is required to maintain the dc output voltage. ceramic, tantalum, or low esr electrolytic capacitors are recommended. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple can be estimated by: ? ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? = 2 c f 8 1 r v v 1 l f v v s esr in out s out out where l is the inductor value and resr is the equivalent series resistance (esr) value of the output capacitor. in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated by: ? ? ? ? ? ? ? ? ? = in out 2 s out out v v 1 2 c l f 8 v v in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: esr in out s out out r v v 1 l f v v ? ? ? ? ? ? ? ? ? = the characteristics of the output capacitor also affect the stability of the regulation system. the mp8709 can be optimized for a wide range of capacitance and esr values. pcb layout pcb layout is very important to achieve stable operation. please follow these guidelines and take figure 4 for references. 1) keep the connection of input ground and gnd pin as short and wide as possible. 2) keep the connection of input capacitor and in pin as short and wide as possible. 3) ensure all feedback connections are short and direct. place the feedback resistors and compensation components as close to the chip as possible. 4) route sw away from sensitive analog areas such as fb. 5) connect in, sw, and especially gnd respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. 6) adding rc snubber circuit from in pin to sw pin can reduce sw spikes. bst sw sw in gnd vcc fb en r 2 c2 l1 c1 gnd on/off top layer bottom layer figure 4?pcb layout
mp8709 ? synchronous step-down conv erter with internal mosfets mp8709 rev. 1.01 www.monolithicpower.com 13 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external bst diode is: z duty cycle is high: d= in out v v >65% in this case, an external bst diode is recommended from the vcc pin to bst pin, as shown in figure 5 sw bst mp8709 c l bst c out external bst diode vcc in4148 figure 5?add optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst cap is 0.1~1f.
mp8709 ? synchronous step-down conv erter with internal mosfets notice: the information in this document is subject to change wi thout notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp8709 rev. 1.01 www.monolithicpower.com 14 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information soic8e (exposed pad) see detail "a" 0.0075(0.19) 0.0098(0.25) 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.000(0.00) 0.006(0.15) 0.051(1.30) 0.067(1.70) top view front view side view bottom view note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ba. 6) drawing is not to scale. 0.089(2.26) 0.101(2.56) 0.124(3.15) 0.136(3.45) recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) 0.103(2.62) 0.138(3.51) 0.150(3.80) 0.157(4.00) pin 1 id 0.189(4.80) 0.197(5.00) 0.228(5.80) 0.244(6.20) 14 85 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o 0.010(0.25) bsc gauge plane

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